NPU（XDNA）をプログラムしてみる　Data移動とベクトル演算編

source ~/mlir-aie/ironenv/bin/activate
source ~/mlir-aie/utils/env_setup.sh

# passthrough_dmas/passthrough_dmas.py  (mlir-aie 公式サンプル)
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
import numpy as np, sys
from aie.iron import ObjectFifo, Program, Runtime
from aie.iron.placers import SequentialPlacer
from aie.iron.device import NPU1Col1, NPU2Col1, XCVC1902

N          = 4096        # byte length（4 KB）
LINE       = 1024        # DMA 行長
if len(sys.argv) > 1:
    N = int(sys.argv[1]); assert N % LINE == 0
dev = {"npu":NPU1Col1, "npu2":NPU2Col1, "xcvc1902":XCVC1902}.get(
        sys.argv[2] if len(sys.argv)>2 else "npu")()

vector_ty  = np.ndarray[(N,),  np.dtype[np.int32]]
line_ty    = np.ndarray[(LINE,), np.dtype[np.int32]]

of_in  = ObjectFifo(line_ty, name="in")          # DDR → AIE
of_out =  of_in.cons().forward()                 # AIE → DDR (DMA forward)

rt = Runtime()
with rt.sequence(vector_ty, vector_ty, vector_ty) as (src, _, dst):
    rt.fill(of_in.prod(), src)                   # ホスト → FIFO
    rt.drain(of_out.cons(), dst, wait=True)      # FIFO → ホスト

module = Program(dev, rt).resolve_program(SequentialPlacer())
print(module)                                    # 生成 MLIR を出力

module {
  aie.device(npu1_1col) {
    %mem_tile_0_1 = aie.tile(0, 1)
    %shim_noc_tile_0_0 = aie.tile(0, 0)
    aie.objectfifo @in_fwd(%mem_tile_0_1, {%shim_noc_tile_0_0}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    aie.objectfifo @in(%shim_noc_tile_0_0, {%mem_tile_0_1}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    aie.objectfifo.link [@in] -> [@in_fwd]([] [0])
    aiex.runtime_sequence @sequence(%arg0: memref<4096xi32>, %arg1: memref<4096xi32>, %arg2: memref<4096xi32>) {
      %0 = aiex.dma_configure_task_for @in {
        aie.dma_bd(%arg0 : memref<4096xi32>, 0, 4096, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 4096, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%0)
      %1 = aiex.dma_configure_task_for @in_fwd {
        aie.dma_bd(%arg2 : memref<4096xi32>, 0, 4096, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 4096, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      } {issue_token = true}
      aiex.dma_start_task(%1)
      aiex.dma_await_task(%1)
      aiex.dma_free_task(%0)
    }
  }
}

(ironenv) ~/mlir-aie/programming_examples/basic/passthrough_dmas$ make 
mkdir -p build
python3 /mlir-aie/programming_examples/basic/passthrough_dmas/passthrough_dmas.py 4096 npu  > build/aie.mlir
mkdir -p build
cd build && aiecc.py --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin 
        --no-xchesscc --no-xbridge 
        --aie-generate-npu-insts --npu-insts-name=insts.bin ../build/aie.mlir
Found xchesscc at /tools/Xilinx/Vitis/2023.2/aietools
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/1 4 WorkersGenerating: /mlir-aie/programming_examples/basic/passthrough_dmas/build/aie.mlir.prj/aie_cdo_elfs.bin
Generating: /mlir-aie/programming_examples/basic/passthrough_dmas/build/aie.mlir.prj/aie_cdo_init.bin
Generating: /mlir-aie/programming_examples/basic/passthrough_dmas/build/aie.mlir.prj/aie_cdo_enable.bin

****** Bootgen v2024.1
  **** Build date : Apr  3 2025-04:13:15
    ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
    ** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.

[INFO]   : Bootimage generated successfully

Info: Embedded Metadata section is missing project.platform.device.core element, adding it.
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/1 4 Workers

rm -rf _build
mkdir -p _build
cd _build &&  cmake /mlir-aie/programming_examples/basic/passthrough_dmas -DTARGET_NAME=passthrough_dmas
CMake Deprecation Warning at CMakeLists.txt:14 (cmake_minimum_required):
  Compatibility with CMake < 3.10 will be removed from a future version of
  CMake.

  Update the VERSION argument <min> value.  Or, use the <min>...<max> syntax
  to tell CMake that the project requires at least <min> but has been updated
  to work with policies introduced by <max> or earlier.

-- The C compiler identification is GNU 13.3.0
-- The CXX compiler identification is GNU 13.3.0
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/bin/gcc-13 - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/bin/g++-13 - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Warning (dev) at CMakeLists.txt:45 (find_package):
  Policy CMP0167 is not set: The FindBoost module is removed.  Run "cmake
  --help-policy CMP0167" for policy details.  Use the cmake_policy command to
  set the policy and suppress this warning.

This warning is for project developers.  Use -Wno-dev to suppress it.

-- Found Boost: /usr/lib/x86_64-linux-gnu/cmake/Boost-1.83.0/BoostConfig.cmake (found version "1.83.0")
-- Configuring done (0.3s)
-- Generating done (0.0s)
-- Build files have been written to: mlir-aie/programming_examples/basic/passthrough_dmas/_build
cd _build &&  cmake --build . --config Release
gmake[1]: Entering directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
gmake[2]: Entering directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
gmake[3]: Entering directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
gmake[3]: Leaving directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
gmake[3]: Entering directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
[ 33%] Building CXX object CMakeFiles/passthrough_dmas.dirmlir-aie/runtime_lib/test_lib/test_utils.cpp.o
[ 66%] Building CXX object CMakeFiles/passthrough_dmas.dir/test.cpp.o
[100%] Linking CXX executable passthrough_dmas
gmake[3]: Leaving directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
[100%] Built target passthrough_dmas
gmake[2]: Leaving directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
gmake[1]: Leaving directory 'mlir-aie/programming_examples/basic/passthrough_dmas/_build'
cp _build/passthrough_dmas passthrough_dmas.exe 
./passthrough_dmas.exe -x build/final.xclbin -i build/insts.bin -k MLIR_AIE -l 4096
Name: MLIR_AIE

PASS!

#!/usr/bin/env python3
# ベクトル要素すべてに +1 する例
import sys, numpy as np
from aie.iron import ObjectFifo, Program, Runtime, Worker
from aie.iron.placers import SequentialPlacer
from aie.iron.device import NPU1Col1
from aie.iron.controlflow import range_

# -------------------------------------------------------------
# パラメータ
# -------------------------------------------------------------
TOTAL = 1024  # 総要素数
MEM_CH = 64  # MemTile 1チャンク = 64 要素
TILE_CH = 32  # AIE Tile 1チャンク = 32 要素
DEV = NPU1Col1()  # NPU 1col

# NumPy 型定義
vec_ty = np.ndarray[(TOTAL,), np.dtype[np.int32]]
mem_ty = np.ndarray[(MEM_CH,), np.dtype[np.int32]]
tile_ty = np.ndarray[(TILE_CH,), np.dtype[np.int32]]

# -------------------------------------------------------------
# FIFO 構成：DDR → MemTile → AIE Tile → DDR
# -------------------------------------------------------------
of_ddr2mem = ObjectFifo(mem_ty, name="ddr2mem")
of_mem2aie = of_ddr2mem.cons().forward(obj_type=tile_ty)
of_aie2mem = ObjectFifo(tile_ty, name="aie2mem")  # 演算結果
of_mem2ddr = of_aie2mem.cons().forward(obj_type=mem_ty)

# -------------------------------------------------------------
# AIE コアの処理本体
# -------------------------------------------------------------
def core(src_fifo, dst_fifo):
    # 総ループ回数: TOTAL/TILE_CH
    for _ in range_(TOTAL // TILE_CH):
        in_v = src_fifo.acquire(1)  # 32要素ロック
        out_v = dst_fifo.acquire(1)
        # 32 要素に +1
        for i in range_(TILE_CH):
            out_v[i] = in_v[i] + 1
        src_fifo.release(1)
        dst_fifo.release(1)

# Worker = AIE タイルに core を配置
worker = Worker(core, fn_args=[of_mem2aie.cons(), of_aie2mem.prod()])

# -------------------------------------------------------------
# ランタイム（データ転送）
# -------------------------------------------------------------
rt = Runtime()
with rt.sequence(vec_ty, vec_ty) as (src, dst):
    rt.start(worker)  # コア動作開始
    rt.fill(of_ddr2mem.prod(), src)  # 入力を FIFO へ書き込み
    rt.drain(of_mem2ddr.cons(), dst, wait=True)

# -------------------------------------------------------------
# 実行
# -------------------------------------------------------------
prog = Program(DEV, rt).resolve_program(SequentialPlacer())
print(prog)

module {
  aie.device(npu1_1col) {
    %tile_0_2 = aie.tile(0, 2)
    %mem_tile_0_1 = aie.tile(0, 1)
    %shim_noc_tile_0_0 = aie.tile(0, 0)
    aie.objectfifo @ddr2mem_fwd(%mem_tile_0_1, {%tile_0_2}, 2 : i32) : !aie.objectfifo<memref<32xi32>> 
    aie.objectfifo @ddr2mem(%shim_noc_tile_0_0, {%mem_tile_0_1}, 2 : i32) : !aie.objectfifo<memref<64xi32>> 
    aie.objectfifo.link [@ddr2mem] -> [@ddr2mem_fwd]([] [0])
    aie.objectfifo @aie2mem_fwd(%mem_tile_0_1, {%shim_noc_tile_0_0}, 2 : i32) : !aie.objectfifo<memref<64xi32>> 
    aie.objectfifo @aie2mem(%tile_0_2, {%mem_tile_0_1}, 2 : i32) : !aie.objectfifo<memref<32xi32>> 
    aie.objectfifo.link [@aie2mem] -> [@aie2mem_fwd]([] [0])
    %core_0_2 = aie.core(%tile_0_2) {
      %c0 = arith.constant 0 : index
      %c9223372036854775807 = arith.constant 9223372036854775807 : index
      %c1 = arith.constant 1 : index
      scf.for %arg0 = %c0 to %c9223372036854775807 step %c1 {
        %c0_0 = arith.constant 0 : index
        %c32 = arith.constant 32 : index
        %c1_1 = arith.constant 1 : index
        scf.for %arg1 = %c0_0 to %c32 step %c1_1 {
          %0 = aie.objectfifo.acquire @ddr2mem_fwd(Consume, 1) : !aie.objectfifosubview<memref<32xi32>>
          %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview<memref<32xi32>> -> memref<32xi32>
          %2 = aie.objectfifo.acquire @aie2mem(Produce, 1) : !aie.objectfifosubview<memref<32xi32>>
          %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview<memref<32xi32>> -> memref<32xi32>
          %c0_2 = arith.constant 0 : index
          %c32_3 = arith.constant 32 : index
          %c1_4 = arith.constant 1 : index
          scf.for %arg2 = %c0_2 to %c32_3 step %c1_4 {
            %4 = memref.load %1[%arg2] : memref<32xi32>
            %c1_i32 = arith.constant 1 : i32
            %5 = arith.addi %4, %c1_i32 : i32
            memref.store %5, %3[%arg2] : memref<32xi32>
          }
          aie.objectfifo.release @ddr2mem_fwd(Consume, 1)
          aie.objectfifo.release @aie2mem(Produce, 1)
        }
      }
      aie.end
    }
    aiex.runtime_sequence @sequence(%arg0: memref<1024xi32>, %arg1: memref<1024xi32>) {
      %0 = aiex.dma_configure_task_for @ddr2mem {
        aie.dma_bd(%arg0 : memref<1024xi32>, 0, 1024, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1024, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%0)
      %1 = aiex.dma_configure_task_for @aie2mem_fwd {
        aie.dma_bd(%arg1 : memref<1024xi32>, 0, 1024, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1024, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      } {issue_token = true}
      aiex.dma_start_task(%1)
      aiex.dma_await_task(%1)
      aiex.dma_free_task(%0)
    }
  }
}

mkdir -p build
python3 /mlir-aie/programming_examples/basic/vector_scalar_add/vector_scalar_add.py npu > build/aie.mlir
mkdir -p build
cd build && aiecc.py --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host 
        --no-xchesscc --no-xbridge 
        --xclbin-name=final.xclbin --npu-insts-name=insts.bin aie.mlir
Found xchesscc at /tools/Xilinx/Vitis/2023.2/aietools
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/2 4 WorkersGenerating: /mlir-aie/programming_examples/basic/vector_scalar_add/build/aie.mlir.prj/aie_cdo_elfs.bin
Generating: /mlir-aie/programming_examples/basic/vector_scalar_add/build/aie.mlir.prj/aie_cdo_init.bin
Generating: /mlir-aie/programming_examples/basic/vector_scalar_add/build/aie.mlir.prj/aie_cdo_enable.bin

****** Bootgen v2024.1
  **** Build date : Apr  3 2025-04:13:15
    ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
    ** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.

[INFO]   : Bootimage generated successfully

Info: Embedded Metadata section is missing project.platform.device.core element, adding it.
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━╺━━━━━━━━━━━━━━━━━━━  50% -:--:-- 0:00:00 1/2 4 Workers

# vector_vector_add/vector_vector_add.py -*- Python -*-
#
# This file is licensed under the Apache License v2.0 with LLVM Exceptions.
# See https://llvm.org/LICENSE.txt for license information.
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
#
# (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
import numpy as np
import sys

from aie.iron import ObjectFifo, Program, Runtime, Worker
from aie.iron.placers import SequentialPlacer
from aie.iron.device import NPU1Col1, NPU2, XCVC1902
from aie.iron.controlflow import range_

def my_vector_add():
    N = 256
    n = 16
    N_div_n = N // n

    if len(sys.argv) != 3:
        raise ValueError("[ERROR] Need 2 command line arguments (Device name, Col)")

    if sys.argv[1] == "npu":
        dev = NPU1Col1()
    elif sys.argv[1] == "npu2":
        dev = NPU2()
    elif sys.argv[1] == "xcvc1902":
        dev = XCVC1902()
    else:
        raise ValueError("[ERROR] Device name {} is unknown".format(sys.argv[1]))

    # Define tensor types
    tensor_ty = np.ndarray[(N,), np.dtype[np.int32]]
    tile_ty = np.ndarray[(n,), np.dtype[np.int32]]

    # AIE-array data movement with object fifos
    of_in1 = ObjectFifo(tile_ty, name="in1")
    of_in2 = ObjectFifo(tile_ty, name="in2")
    of_out = ObjectFifo(tile_ty, name="out")

    # Define a task that will run on a compute tile
    def core_body(of_in1, of_in2, of_out):
        # Number of sub-vector "tile" iterations
        for _ in range_(N_div_n):
            elem_in1 = of_in1.acquire(1)
            elem_in2 = of_in2.acquire(1)
            elem_out = of_out.acquire(1)
            for i in range_(n):
                elem_out[i] = elem_in1[i] + elem_in2[i]
            of_in1.release(1)
            of_in2.release(1)
            of_out.release(1)

    # Create a worker to run the task on a compute tile
    worker = Worker(core_body, fn_args=[of_in1.cons(), of_in2.cons(), of_out.prod()])

    # Runtime operations to move data to/from the AIE-array
    rt = Runtime()
    with rt.sequence(tensor_ty, tensor_ty, tensor_ty) as (A, B, C):
        rt.start(worker)
        rt.fill(of_in1.prod(), A)
        rt.fill(of_in2.prod(), B)
        rt.drain(of_out.cons(), C, wait=True)

    # Place program components (assign them resources on the device) and generate an MLIR module
    return Program(dev, rt).resolve_program(SequentialPlacer())

module = my_vector_add()
print(module)

module {
  aie.device(npu1_1col) {
    %tile_0_2 = aie.tile(0, 2)
    %shim_noc_tile_0_0 = aie.tile(0, 0)
    aie.objectfifo @A(%shim_noc_tile_0_0, {%tile_0_2}, 2 : i32) : !aie.objectfifo<memref<32xi32>> 
    aie.objectfifo @C(%tile_0_2, {%shim_noc_tile_0_0}, 2 : i32) : !aie.objectfifo<memref<32xi32>> 
    aie.objectfifo @B(%shim_noc_tile_0_0, {%tile_0_2}, 2 : i32) : !aie.objectfifo<memref<32xi32>> 
    %core_0_2 = aie.core(%tile_0_2) {
      %c0 = arith.constant 0 : index
      %c9223372036854775807 = arith.constant 9223372036854775807 : index
      %c1 = arith.constant 1 : index
      scf.for %arg0 = %c0 to %c9223372036854775807 step %c1 {
        %c0_0 = arith.constant 0 : index
        %c32 = arith.constant 32 : index
        %c1_1 = arith.constant 1 : index
        scf.for %arg1 = %c0_0 to %c32 step %c1_1 {
          %0 = aie.objectfifo.acquire @A(Consume, 1) : !aie.objectfifosubview<memref<32xi32>>
          %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview<memref<32xi32>> -> memref<32xi32>
          %2 = aie.objectfifo.acquire @B(Consume, 1) : !aie.objectfifosubview<memref<32xi32>>
          %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview<memref<32xi32>> -> memref<32xi32>
          %4 = aie.objectfifo.acquire @C(Produce, 1) : !aie.objectfifosubview<memref<32xi32>>
          %5 = aie.objectfifo.subview.access %4[0] : !aie.objectfifosubview<memref<32xi32>> -> memref<32xi32>
          %c0_2 = arith.constant 0 : index
          %c32_3 = arith.constant 32 : index
          %c1_4 = arith.constant 1 : index
          scf.for %arg2 = %c0_2 to %c32_3 step %c1_4 {
            %6 = memref.load %1[%arg2] : memref<32xi32>
            %7 = memref.load %3[%arg2] : memref<32xi32>
            %8 = arith.addi %6, %7 : i32
            memref.store %8, %5[%arg2] : memref<32xi32>
          }
          aie.objectfifo.release @A(Consume, 1)
          aie.objectfifo.release @B(Consume, 1)
          aie.objectfifo.release @C(Produce, 1)
        }
      }
      aie.end
    }
    aiex.runtime_sequence @sequence(%arg0: memref<1024xi32>, %arg1: memref<1024xi32>, %arg2: memref<1024xi32>) {
      %0 = aiex.dma_configure_task_for @A {
        aie.dma_bd(%arg0 : memref<1024xi32>, 0, 1024, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1024, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%0)
      %1 = aiex.dma_configure_task_for @B {
        aie.dma_bd(%arg1 : memref<1024xi32>, 0, 1024, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1024, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%1)
      %2 = aiex.dma_configure_task_for @C {
        aie.dma_bd(%arg2 : memref<1024xi32>, 0, 1024, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1024, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      } {issue_token = true}
      aiex.dma_start_task(%2)
      aiex.dma_await_task(%2)
      aiex.dma_free_task(%0)
      aiex.dma_free_task(%1)
    }
  }
}

rm -rf _build
mkdir -p _build
cd _build &&  cmake mlir-aie/programming_examples/basic/vector_vector_add -DTARGET_NAME=vector_vector_add
CMake Deprecation Warning at CMakeLists.txt:14 (cmake_minimum_required):
  Compatibility with CMake < 3.10 will be removed from a future version of
  CMake.

  Update the VERSION argument <min> value.  Or, use the <min>...<max> syntax
  to tell CMake that the project requires at least <min> but has been updated
  to work with policies introduced by <max> or earlier.

-- The C compiler identification is GNU 13.3.0
-- The CXX compiler identification is GNU 13.3.0
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/bin/gcc-13 - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/bin/g++-13 - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Warning (dev) at CMakeLists.txt:45 (find_package):
  Policy CMP0167 is not set: The FindBoost module is removed.  Run "cmake
  --help-policy CMP0167" for policy details.  Use the cmake_policy command to
  set the policy and suppress this warning.

This warning is for project developers.  Use -Wno-dev to suppress it.

-- Found Boost: /usr/lib/x86_64-linux-gnu/cmake/Boost-1.83.0/BoostConfig.cmake (found version "1.83.0")
-- Configuring done (0.3s)
-- Generating done (0.0s)
-- Build files have been written to: mlir-aie/programming_examples/basic/vector_vector_add/_build
cd _build &&  cmake --build . --config Release
gmake[1]: Entering directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
gmake[2]: Entering directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
gmake[3]: Entering directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
gmake[3]: Leaving directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
gmake[3]: Entering directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
[ 33%] Building CXX object CMakeFiles/vector_vector_add.dirmlir-aie/runtime_lib/test_lib/test_utils.cpp.o
[ 66%] Building CXX object CMakeFiles/vector_vector_add.dir/test.cpp.o
[100%] Linking CXX executable vector_vector_add
gmake[3]: Leaving directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
[100%] Built target vector_vector_add
gmake[2]: Leaving directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
gmake[1]: Leaving directory 'mlir-aie/programming_examples/basic/vector_vector_add/_build'
cp _build/vector_vector_add vector_vector_add.exe 
mkdir -p build
python3 mlir-aie/programming_examples/basic/vector_vector_add/vector_vector_add.py npu 0 > build/aie.mlir
mkdir -p build
cd build && aiecc.py --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host 
        --no-xchesscc --no-xbridge 
        --xclbin-name=final.xclbin --npu-insts-name=insts.bin aie.mlir
Found xchesscc at /tools/Xilinx/Vitis/2023.2/aietools
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/2 4 WorkersGenerating: mlir-aie/programming_examples/basic/vector_vector_add/build/aie.mlir.prj/aie_cdo_elfs.bin
Generating: mlir-aie/programming_examples/basic/vector_vector_add/build/aie.mlir.prj/aie_cdo_init.bin
Generating: mlir-aie/programming_examples/basic/vector_vector_add/build/aie.mlir.prj/aie_cdo_enable.bin

****** Bootgen v2024.1
  **** Build date : Apr  3 2025-04:13:15
    ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
    ** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.

[INFO]   : Bootimage generated successfully

Info: Embedded Metadata section is missing project.platform.device.core element, adding it.
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━╺━━━━━━━━━━━━━━━━━━━  50% -:--:-- 0:00:00 1/2 4 Workers

./vector_vector_add.exe -x build/final.xclbin -i build/insts.bin -k MLIR_AIE

PASS!

#!/usr/bin/env python3
# ベクトル総和を 1 つの値に縮約
import numpy as np
from aie.iron import ObjectFifo, Program, Runtime, Worker, Kernel
from aie.iron.placers import SequentialPlacer
from aie.iron.device import NPU1Col1

N = 1024
DEV = NPU1Col1()

in_ty = np.ndarray[(N,), np.dtype[np.int32]]
out_ty = np.ndarray[(1,), np.dtype[np.int32]]

# FIFO
of_in = ObjectFifo(in_ty, name="vec_in")
of_out = ObjectFifo(out_ty, name="sum_out")

# C++ で書いた AIE カーネル（高速リダクション）
reduce_add = Kernel("reduce_add_vector", "reduce_add.cc.o", [in_ty, out_ty, np.int32])

def core(f_in, f_out, k):
    out = f_out.acquire(1)
    inp = f_in.acquire(1)
    k(inp, out, N)  # C++ カーネル呼び出し
    f_in.release(1)
    f_out.release(1)

worker = Worker(core, fn_args=[of_in.cons(), of_out.prod(), reduce_add])

rt = Runtime()
with rt.sequence(in_ty, out_ty) as (vec, sum_):
    rt.start(worker)
    rt.fill(of_in.prod(), vec)
    rt.drain(of_out.cons(), sum_, wait=True)

print(Program(DEV, rt).resolve_program(SequentialPlacer()))

module {
  aie.device(npu1_1col) {
    %tile_0_2 = aie.tile(0, 2)
    %shim_noc_tile_0_0 = aie.tile(0, 0)
    aie.objectfifo @sum_out(%tile_0_2, {%shim_noc_tile_0_0}, 2 : i32) : !aie.objectfifo<memref<1xi32>> 
    aie.objectfifo @vec_in(%shim_noc_tile_0_0, {%tile_0_2}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    func.func private @reduce_add_vector(memref<1024xi32>, memref<1xi32>, i32)
    %core_0_2 = aie.core(%tile_0_2) {
      %c0 = arith.constant 0 : index
      %c9223372036854775807 = arith.constant 9223372036854775807 : index
      %c1 = arith.constant 1 : index
      scf.for %arg0 = %c0 to %c9223372036854775807 step %c1 {
        %0 = aie.objectfifo.acquire @sum_out(Produce, 1) : !aie.objectfifosubview<memref<1xi32>>
        %1 = aie.objectfifo.subview.access %0[0] : !aie.objectfifosubview<memref<1xi32>> -> memref<1xi32>
        %2 = aie.objectfifo.acquire @vec_in(Consume, 1) : !aie.objectfifosubview<memref<1024xi32>>
        %3 = aie.objectfifo.subview.access %2[0] : !aie.objectfifosubview<memref<1024xi32>> -> memref<1024xi32>
        %c1024_i32 = arith.constant 1024 : i32
        func.call @reduce_add_vector(%3, %1, %c1024_i32) : (memref<1024xi32>, memref<1xi32>, i32) -> ()
        aie.objectfifo.release @vec_in(Consume, 1)
        aie.objectfifo.release @sum_out(Produce, 1)
      }
      aie.end
    } {link_with = "reduce_add.cc.o"}
    aiex.runtime_sequence @sequence(%arg0: memref<1024xi32>, %arg1: memref<1xi32>) {
      %0 = aiex.dma_configure_task_for @vec_in {
        aie.dma_bd(%arg0 : memref<1024xi32>, 0, 1024, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1024, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%0)
      %1 = aiex.dma_configure_task_for @sum_out {
        aie.dma_bd(%arg1 : memref<1xi32>, 0, 1, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      } {issue_token = true}
      aiex.dma_start_task(%1)
      aiex.dma_await_task(%1)
      aiex.dma_free_task(%0)
    }
  }
}

mkdir -p build
python3 mlir-aie/programming_examples/basic/vector_reduce_add/vector_reduce_add.py npu 0 > build/aie.mlir
mkdir -p build
cd build && mlir-aie/ironenv/lib/python3.12/site-packages/llvm-aie/bin/clang++ -O2 -std=c++20 --target=aie2-none-unknown-elf -Wno-parentheses -Wno-attributes -Wno-macro-redefined -Wno-empty-body -DNDEBUG -I mlir-aie/ironenv/lib/python3.12/site-packages/mlir_aie/include   -c mlir-aie/programming_examples/basic/vector_reduce_add/../../../aie_kernels/aie2/reduce_add.cc -o reduce_add.cc.o
mkdir -p build
cd build && aiecc.py --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin 
        --no-xchesscc --no-xbridge --peano mlir-aie/ironenv/lib/python3.12/site-packages/llvm-aie 
                        --aie-generate-npu-insts --npu-insts-name=insts.bin ../build/aie.mlir
Found xchesscc at /tools/Xilinx/Vitis/2023.2/aietools
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/2 4 WorkersGenerating: mlir-aie/programming_examples/basic/vector_reduce_add/build/aie.mlir.prj/aie_cdo_elfs.bin
Generating: mlir-aie/programming_examples/basic/vector_reduce_add/build/aie.mlir.prj/aie_cdo_init.bin
Generating: mlir-aie/programming_examples/basic/vector_reduce_add/build/aie.mlir.prj/aie_cdo_enable.bin

****** Bootgen v2024.1
  **** Build date : Apr  3 2025-04:13:15
    ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
    ** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.

[INFO]   : Bootimage generated successfully

Info: Embedded Metadata section is missing project.platform.device.core element, adding it.
 AIE Compilation: ━━━━━━━━━━━━━━━━━━━━╺━━━━━━━━━━━━━━━━━━━  50% -:--:-- 0:00:00 1/2 4 Workers

rm -rf _build
mkdir -p _build
cd _build &&  cmake /mlir-aie/programming_examples/basic/vector_reduce_add -DTARGET_NAME=vector_reduce_add
CMake Deprecation Warning at CMakeLists.txt:14 (cmake_minimum_required):
  Compatibility with CMake < 3.10 will be removed from a future version of
  CMake.

  Update the VERSION argument <min> value.  Or, use the <min>...<max> syntax
  to tell CMake that the project requires at least <min> but has been updated
  to work with policies introduced by <max> or earlier.

-- The C compiler identification is GNU 14.2.0
-- The CXX compiler identification is GNU 14.2.0
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Check for working C compiler: /usr/bin/cc - skipped
-- Detecting C compile features
-- Detecting C compile features - done
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Check for working CXX compiler: /usr/bin/c++ - skipped
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Warning (dev) at CMakeLists.txt:40 (find_package):
  Policy CMP0167 is not set: The FindBoost module is removed.  Run "cmake
  --help-policy CMP0167" for policy details.  Use the cmake_policy command to
  set the policy and suppress this warning.

This warning is for project developers.  Use -Wno-dev to suppress it.

-- Found Boost: /usr/lib/x86_64-linux-gnu/cmake/Boost-1.83.0/BoostConfig.cmake (found version "1.83.0")
-- Configuring done (0.3s)
-- Generating done (0.0s)
-- Build files have been written to: /mlir-aie/programming_examples/basic/vector_reduce_add/_build
cd _build &&  cmake --build . --config Release
gmake[1]: Entering directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
gmake[2]: Entering directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
gmake[3]: Entering directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
gmake[3]: Leaving directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
gmake[3]: Entering directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
[ 33%] Building CXX object CMakeFiles/vector_reduce_add.dir/mlir-aie/runtime_lib/test_lib/test_utils.cpp.o
[ 66%] Building CXX object CMakeFiles/vector_reduce_add.dir/test.cpp.o
[100%] Linking CXX executable vector_reduce_add
gmake[3]: Leaving directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
[100%] Built target vector_reduce_add
gmake[2]: Leaving directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
gmake[1]: Leaving directory '/mlir-aie/programming_examples/basic/vector_reduce_add/_build'
cp _build/vector_reduce_add vector_reduce_add.exe 
./vector_reduce_add.exe -x build/final.xclbin -i build/insts.bin -k MLIR_AIE

Avg NPU time: 327us.

Min NPU time: 327us.

Max NPU time: 327us.

PASS!

#!/usr/bin/env python3
# -------------------------------------------------------------
# Single-Buffer DMA  : FIFO depth=1（転送と演算を逐次化）
# 機能：DDR → AIE → DDR へ 4 KB memcpy（AI Engine コアは未使用）
# -------------------------------------------------------------
import numpy as np
from aie.iron import ObjectFifo, Runtime, Program
from aie.iron.placers import SequentialPlacer
from aie.iron.device import NPU1Col1

def build():
    BYTES = 4096  # 総転送量
    LINE_BYTES = 1024  # 1 DMA 行
    dev = NPU1Col1()  # Ryzen™ AI (1col) を想定

    vec_ty = np.ndarray[(BYTES,), np.dtype[np.int32]]
    line_ty = np.ndarray[(LINE_BYTES,), np.dtype[np.int32]]

    # ▼ depth=1 なのでシングルバッファ
    of_in = ObjectFifo(line_ty, depth=1, name="in")
    of_out = of_in.cons().forward()  # AIE→DDR へ回帰

    rt = Runtime()
    with rt.sequence(vec_ty, vec_ty) as (src, dst):
        rt.fill(of_in.prod(), src)  # ホスト → FIFO
        rt.drain(of_out.cons(), dst, wait=True)

    return Program(dev, rt).resolve_program(SequentialPlacer())

# コマンドライン実行時は MLIR を出力
if __name__ == "__main__":
    print(build())

module {
  aie.device(npu1_1col) {
    %mem_tile_0_1 = aie.tile(0, 1)
    %shim_noc_tile_0_0 = aie.tile(0, 0)
    aie.objectfifo @out(%mem_tile_0_1, {%shim_noc_tile_0_0}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    aie.objectfifo @in(%shim_noc_tile_0_0, {%mem_tile_0_1}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    aie.objectfifo.link [@in] -> [@out]([] [0])
    aiex.runtime_sequence @sequence(%arg0: memref<4096xi32>, %arg1: memref<4096xi32>) {
      %0 = aiex.dma_configure_task_for @in {
        aie.dma_bd(%arg0 : memref<4096xi32>, 0, 4096, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 4096, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%0)
      %1 = aiex.dma_configure_task_for @out {
        aie.dma_bd(%arg1 : memref<4096xi32>, 0, 4096, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 4096, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      } {issue_token = true}
      aiex.dma_start_task(%1)
      aiex.dma_await_task(%1)
      aiex.dma_free_task(%0)
    }
  }
}

python3 design.py > build.mlir
aiecc.py           build.mlir test.cpp -o host --xclbin build.xclbin
Found xchesscc at /tools/Xilinx/Vitis/2023.2/aietools
 MLIR compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/1 1 Worker/tools/Xilinx/Vitis/2023.2/aietools/tps/lnx64/target_aie_ml/bin/LNa64bin/chess-llvm-link: /mlir-aie/ironenv/lib/python3.12/site-packages/mlir_aie/aie_runtime_lib/AIE2/chess_intrinsic_wrapper.ll:56:28: error: unterminated attribute group
attributes #1 = { nounwind memory(inaccessiblemem: readwrite) "frame-pointer"="all" "no-builtin-memcpy" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
                           ^
/tools/Xilinx/Vitis/2023.2/aietools/tps/lnx64/target_aie_ml/bin/LNa64bin/chess-llvm-link: error:  loading file '/mlir-aie/ironenv/lib/python3.12/site-packages/mlir_aie/aie_runtime_lib/AIE2/chess_intrinsic_wrapper.ll'
Error encountered while running: /tools/Xilinx/Vitis/2023.2/aietools/tps/lnx64/target_aie_ml/bin/LNa64bin/chess-llvm-link /mlir-aie/programming_examples/basic/buffer/single_buffer/build.mlir.prj/input.llchesshack.ll /mlir-aie/ironenv/lib/python3.12/site-packages/mlir_aie/aie_runtime_lib/AIE2/chess_intrinsic_wrapper.ll -S -o /mlir-aie/programming_examples/basic/buffer/single_buffer/build.mlir.prj/input.llchesslinked.ll
 MLIR compilation: ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━   0% -:--:-- 0:00:00 0/1 1 Worker
make: *** [Makefile:18: build.xclbin] Error 1

#!/usr/bin/env python3
# Double-Buffer DMA : FIFO default_depth=2（ping-pong）
import numpy as np
from aie.iron import ObjectFifo, Runtime, Program
from aie.iron.placers import SequentialPlacer
from aie.iron.device import NPU1Col1

def build():
    BYTES, LINE = 4096, 1024
    dev = NPU1Col1()

    vec_ty = np.ndarray[(BYTES,), np.dtype[np.int32]]
    line_ty = np.ndarray[(LINE,), np.dtype[np.int32]]

    # ★ ここを default_depth=2 に修正
    of_in = ObjectFifo(line_ty, default_depth=2, name="in")
    of_out = of_in.cons().forward(name="out")  # ここは深さ継承

    rt = Runtime()
    with rt.sequence(vec_ty, vec_ty) as (src, dst):
        rt.fill(of_in.prod(), src)
        rt.drain(of_out.cons(), dst, wait=True)

    return Program(dev, rt).resolve_program(SequentialPlacer())

if __name__ == "__main__":
    print(build())

module {
  aie.device(npu1_1col) {
    %shim_noc_tile_0_0 = aie.tile(0, 0)
    %mem_tile_0_1 = aie.tile(0, 1)
    aie.objectfifo @in(%shim_noc_tile_0_0, {%mem_tile_0_1}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    aie.objectfifo @out(%mem_tile_0_1, {%shim_noc_tile_0_0}, 2 : i32) : !aie.objectfifo<memref<1024xi32>> 
    aie.objectfifo.link [@in] -> [@out]([] [0])
    aiex.runtime_sequence @sequence(%arg0: memref<4096xi32>, %arg1: memref<4096xi32>) {
      %0 = aiex.dma_configure_task_for @in {
        aie.dma_bd(%arg0 : memref<4096xi32>, 0, 4096, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 4096, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      }
      aiex.dma_start_task(%0)
      %1 = aiex.dma_configure_task_for @out {
        aie.dma_bd(%arg1 : memref<4096xi32>, 0, 4096, [<size = 1, stride = 0>, <size = 1, stride = 0>, <size = 1, stride = 0>, <size = 4096, stride = 1>]) {burst_length = 0 : i32}
        aie.end
      } {issue_token = true}
      aiex.dma_start_task(%1)
      aiex.dma_await_task(%1)
      aiex.dma_free_task(%0)
    }
  }
}